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Assembleur SuperH

STC

SuperH Store Control Register

Syntaxe

STC SR,Rn
STC GBR,Rn
STC VBR,Rn
STC MOD,Rn
STC RE,Rn
STC RS,Rn
STC.L SR,@-Rn
STC.L GBR,@-Rn
STC.L VBR,@-Rn
STC.L MOD,@-Rn
STC.L RE,@-Rn
STC.L RS,@-Rn

Description

Cette instruction permet d'entreposer les données du registre de contrôle SR, GBR, VBR, MOD, RE ou RS dans la destination spécifié.

Algorithme

MODULE STCSR(n) * STC SR,Rn
   R[n] ← SR
   PC ← PC + 2

MODULE STCGBR(n) * STC GBR,Rn
   R[n] ← GBR
   PC ← PC + 2

MODULE STCVBR(n) * STC VBR,Rn
   R[n] ← VBR
   PC ← PC + 2

MODULE STCMOD(n) * STC MOD,Rn
   R[n] ← MOD
   PC ← PC + 2

MODULE STCRE(n) * STC RE,Rn
   R[n] ← RE
   PC ← PC + 2

MODULE STCRS(n) * STC RS,Rn
   R[n] ← RS
   PC ← PC + 2

MODULE STCMSR(n) * STC.L SR,@-Rn
   R[n] ← R[n] - 4
   Write_Long(R[n],SR)
   PC ← PC + 2

MODULE STCMGBR(n) * STC.L GBR,@-Rn
   R[n] ← R[n] - 4
   Write_Long(R[n],GBR)
   PC ← PC + 2

MODULE STCMVBR(n) * STC.L VBR,@-Rn
   R[n] ← R[n] - 4
   Write_Long(R[n],VBR)
   PC ← PC + 2

MODULE STCMMOD(n) * STC.L MOD,@-Rn
   R[n] ← R[n] - 4
   Write_Long(R[n],MOD)
   PC ← PC + 2

MODULE STCMRE(n) * STC.L RE,@-Rn
   R[n] ← R[n] - 4
   Write_Long(R[n],RE)
   PC ← PC + 2

MODULE STCMRS(n) * STC.L RS,@-Rn
   R[n] ← R[n] - 4
   Write_Long(R[n],SR)
   PC ← PC + 2

Mnémonique

Instruction Abstrait Opcode Cycle
STC SR,Rn Rn ← SR 0000nnnn00000010 1
STC GBR,Rn Rn ← GBR 0000nnnn00010010 1
STC VBR,Rn Rn ← VBR 0000nnnn00100010 1
STC MOD,Rn Rn ← MOD 0000nnnn01010010 1
STC RE,Rn Rn ← RE 0000nnnn01110010 1
STC RS,Rn Rn ← RS 0000nnnn01100010 1
STC.L SR,@-Rn Rn ← Rn - 4, (Rn) ← SR 0100nnnn00000011 2
STC.L GBR,@-Rn Rn ← Rn - 4, (Rn) ← GBR 0100nnnn00010011 2
STC.L VBR,@-Rn Rn ← Rn - 4, (Rn) ← VBR 0100nnnn00100011 2
STC.L MOD,@-Rn Rn ← Rn - 4, (Rn) ← MOD 0100nnnn01010011 2
STC.L RE,@-Rn Rn ← Rn - 4, (Rn) ← RE 0100nnnn01110011 2
STC.L RS,@-Rn Rn &lar; Rn - 4, (Rn) ← RS 0100nnnn01100011 2


Dernière mise à jour : Mardi, le 28 juillet 2015